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A Discrete-Time MOS Parametric Amplifier-Based Chopped Signal Demodulator

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This article presents a discrete-time parametric amplifier (DTPA) as the signal demodulator for chopper amplifier. Unlike the conventional chopper, the DTPA demodulator features noise-efficient gain augmentation while demodulating the chopped… Click to show full abstract

This article presents a discrete-time parametric amplifier (DTPA) as the signal demodulator for chopper amplifier. Unlike the conventional chopper, the DTPA demodulator features noise-efficient gain augmentation while demodulating the chopped signal. The demodulator also enables low-frequency noise cancellation during the inherent track-and-hold (T/H) process of the charge parametrization. The positive feedback loop and the dc servo loop are implemented for applications requiring larger input impedance and dc input offset cancellation using a bandpass transfer function. Design considerations for the DTPA-based demodulator circuit and the merits and demerits of the chopper–DTPA amplifier are discussed as well. The proposed design has been fabricated in a standard 180-nm CMOS technology node. The complete design occupies 0.127 mm2 of the die area and consumes 2.4- $\mu \text{W}$ power from a 1.5 V of $\text{V}_{\text {DD}}$ . The measurement results show that the DTPA demodulator provides 8-dB gain enhancement while improving on the prior art of T/H-based demodulator and the amplifier achieves input referred noise voltage of $2~ \mu \text {V}_{\text {rms}}$ in 143-Hz bandwidth.

Keywords: tex math; demodulator; inline formula; signal demodulator

Journal Title: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year Published: 2020

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