LAUSR

In this article, we explore the design of energy-efficient intermittently powered systems (IPSs) using reconfigurable-ferroelectric transistors (R-FEFETs). Utilizing the dynamic tunability between volatile and nonvolatile modes of operation in R-FEFETs, we design nonvolatile flip-flops (NVFFs) and memory (NVM) suitable for IPS. We present two variants of R-FEFET-based NVFFs (RNVFFs): 1) with automatic backup and 2) with need-based backup. While the former offers high backup energy efficiency, the latter offers low normal operation energy. We also present an IPS-specific R-FEFET-based NVM (3T-R) with high energy efficiency compared with FEFET-based 2T NVM. Leveraging these nonvolatile circuits, we map the microcontroller unit (MCU) core registers of an IPS to RNVFFs and its on-chip memory to 3T-R. Subsequently, we analyze system-level implications of improving NVFFs and NVM individually by using R-FEFETs compared with existing FEFET-based designs. Our system-level simulations demonstrate that although we improve the register energy by 55%–67%, the total memory and system-level energy savings obtained from just improving the NVFFs (registers) in the microcontroller core are only 0.60%–5.78% and 0.31%–3.18%, respectively. However, improving the NVM by using 3T-R results in a much larger total memory and system-level energy savings in the range of 37%–40% and 20%–22%, respectively, in the context of a state-of-the-art IPS.