LAUSR

Even though routability is of great concern to a recent global placement algorithm, there still exists a large room to improve it. To make legalization more easier and get a better placement, this article proposes an iterative approach to refine cell locations after global placement, where wirelength and routability are separately optimized in each iteration. It first moves cells to better locations to reduce wirelength. Unlike previous approaches, our approach guarantees that no wirelength will be increased so that the previous optimization result can be better maintained. Moreover, we propose a delicate procedure to move cells according to their gain values to reduce the largest wirelength. Next, the whitespace re-allocation approach is applied to redistribute whitespace over a chip to improve routability without changing relative locations of cells. To ensure that enough space will be allocated to the most routing congestion regions, we propose a sigmoid function to increase routing demands of regions according to their routing overflows and number of pins. The experimental results show that our methodology can obtain shorter wirelength and better routability in industrial designs when compared to other approach.