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Voltage harmonics reduction in single phase 9-level transistor clamped H-bridge inverter using nearest level control method

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Received Jun 1, 2020 Revised Aug 1, 2020 Accepted Aug 17, 2020 This paper proposes a nearest level control method based modulation scheme for a 9-level symmetrical transistor clamped H-bridge… Click to show full abstract

Received Jun 1, 2020 Revised Aug 1, 2020 Accepted Aug 17, 2020 This paper proposes a nearest level control method based modulation scheme for a 9-level symmetrical transistor clamped H-bridge (TCHB) inverter. The topology has gained increasing research focus due to its advantages in obtaining high-quality output while using a reduced number of electronic components. The device count for getting a 9-level output voltage is 10 switches compared to 16 switches being used in a conventional 9-level cascaded H-bridge (CHB) inverter. The significant contribution of the research is the development of the nearest level control (NLC) method that operates at the fundamental frequency, thus reducing switching losses, and able to reduce harmonic content significantly. The reduced harmonic content can lessen the power quality problem. The NLC modulation scheme shows that the overall THD is reduced without the need for filtration. The 50 values of harmonic content will be counted that follows the IEEE Standard 519. MATLAB/Simulink based simulations and experimental results obtained from the laboratory prototype of a single-phase TCHB inverter feeding an R load validate the theoretical analyses and effectiveness of the proposed modulation scheme.

Keywords: inverter; nearest level; level; harmonics; level control

Journal Title: Indonesian Journal of Electrical Engineering and Computer Science
Year Published: 2020

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