LAUSR

Considering the manufacturing and packaging process, three-dimensional integrated circuits design often requires irregular chip structures. Three-dimensional integrated circuits with irregular structures can facilitate differentiated chip design and reduce manufacturing costs. Highly complex through-silicon vias have not been considered in past thermal modeling and analysis of irregularly structured three-dimensional integrated circuits. Thus, a detailed model of a three-layer irregularly structured 3D integrated circuit with through-silicon vias and microbumps is developed, and an analytical method based on the thermal resistance network model is proposed to extract the equivalent thermal conductivity of through-silicon vias and microbumps, the accuracy of which is verified by a 3D finite element simulation method. The results show that the maximum temperature and temperature gradient obtained by the equivalent model simulations agree well with the detailed model results, proving the validity of the equivalent model. To save the computational cost, the effects of heat source area, power setting and through-silicon vias structure parameters on the maximum temperature are studied by numerical simulation method based on the equivalent model. Heat source area equal to the overlap between chip layers, high power chips close to the heat sink, and reducing through-silicon vias pitch can better reduce the maximum temperature. The results provide a reference value for thermal design and optimization of three-dimensional integrated circuits with irregular structures.