LAUSR

In this paper, we propose an efficient design methodology for energy-efficient off-chip interconnect. This approach leverages an artificial neural network (ANN) as a surrogate model that significantly improves design efficiency in the frequency-domain. This model utilizes design specifications as the constraint functions to guarantee the satisfaction of design requirements. Additionally, a specified objective function to select low-loss and low-noise structure is employed to determine the optimal case from a large design space. The proposed design flow can find the optimum design that gives maximum eye height (EH) with the largest allowable transmitter supply voltage (VTX) reduction for minimum power consumption. The proposed approach is applied to the microstrip line and stripline structures with single-ended and differential signals for general applicability. For the microstrip line, the proposed methodology performs at a performance speed with 42.7 and 0.5 s per structure for the data generation and optimization process, respectively. In addition, the optimal microstrip line design achieves a 25%VTX reduction. In stripline structures, it takes 31.9 s for the data generation and 0.6 s for the optimization process per structure when the power efficiency reaches a maximum 30.7% peak to peak VTX decrease.