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Performance Analysis of Overcurrent Protection under Corrupted Sampled Value Frames: A Hardware-in-the-Loop Approach

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The IEC 61850 standard aims at digitization substations and provides interoperability between various Intelligent Electronic Device vendors. The digitization process is accompanied by several challenges related to data transmission on… Click to show full abstract

The IEC 61850 standard aims at digitization substations and provides interoperability between various Intelligent Electronic Device vendors. The digitization process is accompanied by several challenges related to data transmission on the ethernet network and the protection behavior under these conditions. Among the challenges, we can mention packet loss, delay, and duplicate frame, which occurs when the merging units (publisher) transmit the sampled values and, for some reason, these packets do not reach the subscriber or are duplicated. Nowadays, most Intelligent Electronic Device manufacturers block the protection function when some sampled value packets are corrupted. The effects of blocking protection when packet loss occurs under normal operating conditions do not cause significant problems. However, when a fault occurs, the corrupted packets can cause a delay in fault clearance, causing even more damage to the grid. The purpose of this article is to present the effects of corrupted sampled values on the performance of overcurrent protection. All the evaluations were performed in real time using the hardware-in-loop simulation approach with a commercial Intelligent Electronic Device. The OP5700 hardware platform from OPAL-RT, with the library “IEC 61850 Data Integrity Manipulation”, was used. The results show that corrupted sampled value frames affect the functioning of the protections.

Keywords: protection; hardware loop; sampled value; corrupted sampled; overcurrent protection

Journal Title: Energies
Year Published: 2023

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