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Accelerating Allreduce With In-Network Reduction on Intel PIUMA

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2 Published in 2022 at "IEEE Micro"

DOI: 10.1109/mm.2021.3139092

Abstract: The Intel Programmable Integrated Unified Memory Architecture (PIUMA) system maps collective operations directly into the network switches and supports pipelined embeddings for high-throughput collective computation. Utilizing these features and PIUMA’s network topology, we develop a… read more here.

Keywords: network; network allreduce; accelerating allreduce; piuma ... See more keywords