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Published in 2018 at "IEEE Transactions on Electron Devices"
DOI: 10.1109/ted.2017.2773560
Abstract: A continuous 2-D analytical drain current model of double-gate (DG) heterojunction tunnel field-effect transistors (HJTFETs) with a SiO2/HfO2 stacked gate-oxide structures has been presented in this paper. The surface potential model has been developed by…
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Keywords:
analytical drain;
drain;
model double;
current model ... See more keywords
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Published in 2020 at "IEEE Transactions on Electron Devices"
DOI: 10.1109/ted.2020.3009086
Abstract: Analytical drain current and capacitance model is developed for the amorphous InGaZnO (a-IGZO) thin-film transistor (TFT). The numerical Pao–Sah model is presented to describe the temperature characteristics considering the deep and tail trap states in…
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Keywords:
temperature characteristics;
drain current;
current capacitance;
analytical drain ... See more keywords