A Novel ASIC Design Flow Using Weight-Tunable Binary Neurons as Standard Cells
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Transactions on Circuits and Systems I: Regular Papers"
DOI: 10.1109/tcsi.2022.3164995
Abstract: In this paper, we describe a design of a mixedsignal circuit for a binary neuron (a.k.a perceptron, threshold logic gate) and a methodology for automatically embedding such cells in ASICs. The binary neuron, referred to… read more here.
Keywords: asic design; threshold voltages; ftl cells; standard cells ... See more keywords
ASIC design of low power-delay product carry pre-computation based multiplier
Sign Up to like & getrecommendations! Published in 2019 at "Indonesian Journal of Electrical Engineering and Computer Science"
DOI: 10.11591/ijeecs.v13.i2.pp845-852
Abstract: High speed and efficient multipliers are essential components in today’s computational circuits like digital signal processing, algorithms for cryptography and high performance processors. Invariably, almost all processing units will contain hardware multipliers based on some… read more here.
Keywords: speed; asic design; power; high speed ... See more keywords