LAUSR

Learning-based reliability assessment method for detection of permanent faults in clockless circuits

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0 Published in 2019 at "Microelectronics Reliability"

DOI: 10.1016/j.microrel.2019.06.057

Abstract: Abstract Permanent faults are a common issue of contemporary CMOS circuits during fabrication and its lifetime. In order to detect these faults, designers adopt logic and delay-oriented testing approaches to validate the circuit's structure. However,… read more here.

Keywords: asynchronous circuits; permanent faults; learning based; based reliability ... See more keywords

A Design Flow for Click-Based Asynchronous Circuits Design With Conventional EDA Tools

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1 Published in 2021 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"

DOI: 10.1109/tcad.2020.3038337

Abstract: The “event-driven” feature of asynchronous circuits enables the circuits to work when and where needed, making it a good alternative to design low-power circuits. However, asynchronous circuits are not widely adopted as a consequence of… read more here.

Keywords: asynchronous circuits; design flow; conventional eda; eda tools ... See more keywords

Hierarchical Model Checking of SystemVerilog-Specified Asynchronous Circuits for Deadlock Detection

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0 Published in 2025 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"

DOI: 10.1109/tcad.2024.3509798

Abstract: Specifying channel-based asynchronous circuits in SystemVerilog is a promising alternative design paradigm to combine the advantages of asynchronous circuits and industrial electronic design automation supports. However, communicating through channels can be error-prone, potentially introducing deadlocks… read more here.

Keywords: model checking; checking systemverilog; asynchronous circuits; hierarchical model ... See more keywords

Toward Efficient Asynchronous Circuits Design Flow Using Backward Delay Propagation Constraint

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0 Published in 2024 at "IEEE Transactions on Very Large Scale Integration (VLSI) Systems"

DOI: 10.1109/tvlsi.2024.3418769

Abstract: In recent years, asynchronous circuits have gained attention in neural network chips and Internet of Things (IoT) due to their potential advantages of low power and high performance. However, design efficiency of asynchronous circuits remains… read more here.

Keywords: circuits design; constraint; design flow; asynchronous circuits ... See more keywords

TFI-FTS: An efficient transient fault injection and fault-tolerant system for asynchronous circuits on FPGA platform

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1 Published in 2021 at "International Journal of Electrical and Computer Engineering"

DOI: 10.11591/ijece.v11i3.pp2704-2710

Abstract: Designing VLSI digital circuits is challenging tasks because of testing the circuits concerning design time. The reliability and productivity of digital integrated circuits are primarily affected by the defects in the manufacturing process or systems.… read more here.

Keywords: fault; fault tolerant; asynchronous circuits; fault injection ... See more keywords