Content Aware Refresh: Exploiting the Asymmetry of DRAM Retention Errors to Reduce the Refresh Frequency of Less Vulnerable Data
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DOI: 10.1109/tc.2018.2868338
Abstract: DRAM refresh is responsible for significant performance and energy overheads in a wide range of computer systems, from mobile platforms to datacenters [1] . With the growing demand for DRAM capacity and the worsening retention time… read more here.
Keywords: content aware; dram; aware refresh; bold bold ... See more keywords
Improving DRAM Performance in 3-D ICs via Temperature Aware Refresh
Sign Up to like & getrecommendations! Published in 2017 at "IEEE Transactions on Very Large Scale Integration (VLSI) Systems"
DOI: 10.1109/tvlsi.2016.2606085
Abstract: The 3-D integration allows IC designs to stack DRAM directly on the top of execution units, which greatly reduces DRAM access latency and improves memory bandwidth. Unfortunately, the heat generated by the processor unit cannot… read more here.
Keywords: temperature; temperature aware; improving dram; aware refresh ... See more keywords