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Published in 2020 at "Microelectronics Reliability"
DOI: 10.1016/j.microrel.2019.113545
Abstract: Abstract As the technology scales down, the performance characteristics are degraded and the reliability of digital circuits against soft error and aging effects are reduced. In this paper, we propose a reliable asymmetric FinFET 6T…
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Keywords:
asymmetric finfet;
sram cell;
back gate;
finfet sram ... See more keywords
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Published in 2019 at "Semiconductor Science and Technology"
DOI: 10.1088/1361-6641/aafccc
Abstract: This paper presents a comparison between nMOS and pMOS Omega-Gate Nanowire for different channel width (W-NW) down to 10 nm as a function of the large back gate bias variation (from +20 to -20 V)…
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Keywords:
voltage;
back gate;
nmos pmos;
gate ... See more keywords
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Published in 2021 at "Semiconductor Science and Technology"
DOI: 10.1088/1361-6641/ac0d9a
Abstract: Three different elements, silicon, selenium, and tellurium, are ion-implanted in gallium arsenide to form a conducting layer that serves as a back-gate to a molecular beam epitaxy overgrown two-dimensional electron gas. While the heavy ion…
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Keywords:
silicon selenium;
mbe grown;
two dimensional;
back gate ... See more keywords
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Published in 2021 at "IEEE Transactions on Very Large Scale Integration (VLSI) Systems"
DOI: 10.1109/tvlsi.2021.3059979
Abstract: The electrostrictive 2-D field-effect transistor (EFET) is a steep-slope device that promises to offer aggressive length and voltage scalability. Two key features of this device are its high-drive strength with high ON–OFF current ratio and…
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Keywords:
tradeoffs design;
fpga fabrics;
evaluation tradeoffs;
design fpga ... See more keywords