Divider-less SAR-based ADDLL
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DOI: 10.1049/el.2017.3387
Abstract: A new all-digital delay-locked loop (ADDLL) using successive-approximation register (SAR) control scheme is presented. The proposed circuit architecture can effectively perform the per-bit acquisition within one clock cycle. Therefore, the divider for generating internal SAR… read more here.
Keywords: divider less; based addll; less sar; sar based ... See more keywords