Gate and drain SEU sensitivity of sub-20-nm FinFET- and Junctionless FinFET-based 6T-SRAM circuits by 3D TCAD simulation
Sign Up to like & getrecommendations! Published in 2017 at "Journal of Computational Electronics"
DOI: 10.1007/s10825-016-0950-y
Abstract: Scaling of metal–oxide–semiconductor field-effect transistors (MOSFETs) to below a few tens of nanometer has failed to make significant improvements. FinFETs were introduced to replace MOS devices in circuits, offering good performance improvement in the nanoscale… read more here.
Keywords: junctionless finfet; based sram; finfet junctionless; finfet ... See more keywords
NCFET-Based 6-T SRAM: Yield Estimation Based on Variation-Aware Sensitivity
Sign Up to like & getrecommendations! Published in 2020 at "IEEE Journal of the Electron Devices Society"
DOI: 10.1109/jeds.2020.2973966
Abstract: The key feature of NCFET (negative capacitance field effect transistor) is its sub-threshold slope (SS) < 60 mV/decade at 300 K. In this work, the n-type NCFET (i.e., pull-down (PD) and passgate (PG) transistor in… read more here.
Keywords: sram yield; variation; based sram; ncfet based ... See more keywords
Design and Simulation of Single Electron Transistor based SRAM and its Memory Controller at Room Temperature
Sign Up to like & getrecommendations! Published in 2019 at "International Journal of Integrated Engineering"
DOI: 10.30880/ijie.2019.11.06.020
Abstract: Heterogeneous 3D integration of single electron transistor (SET) circuits with CMOS based circuits is achieved by stacking a SET layer above CMOS IC. Low power and delay efficient circuits can be designed using SET. In… read more here.
Keywords: temperature; single electron; sram memory; based sram ... See more keywords