Design of A 1-V 3rd-order 1-bit Σ-Δ modulator with inverter-based static–dynamic hybrid structure amplifiers
Sign Up to like & getrecommendations! Published in 2019 at "Analog Integrated Circuits and Signal Processing"
DOI: 10.1007/s10470-019-01532-9
Abstract: A 1-V 3rd-order 1-bit discrete time (DT) Σ-Δ modulator is designed and implemented in a 40-nm CMOS technology. With the input feed forward coefficient optimized, the output swings of the integrators are minimized. The bootstrapped… read more here.
Keywords: order bit; order; based static; 3rd order ... See more keywords
A Novel Base Graph Based Static Scheduling Scheme for Layered Decoding of 5G LDPC Codes
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Communications Letters"
DOI: 10.1109/lcomm.2022.3171658
Abstract: Quasi-cyclic low-density parity-check (QC-LDPC) codes have been selected as the channel coding scheme for 5G new radio (NR) data channel. In this letter, a novel base graph based static scheduling (BGSS) method is proposed for… read more here.
Keywords: novel base; ldpc codes; ldpc; graph based ... See more keywords