Articles with "baud rate" as a keyword



Coded Eight-Dimensional QAM Technique Using Iterative Soft-Output Decoding and Its Demonstration in High Baud-Rate Transmission

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Published in 2017 at "Journal of Lightwave Technology"

DOI: 10.1109/jlt.2017.2669919

Abstract: We proposed coded eight-dimensional (8-D) quadrature amplitude modulation (QAM) and experimentally demonstrated in high baud-rate transmission. Both high baud rate and multilevel modulation techniques are necessary for large capacity long haul transmission without increasing the… read more here.

Keywords: rate transmission; baud rate; transmission; high baud ... See more keywords

A 22.5-to-32-Gb/s 3.2-pJ/b Referenceless Baud-Rate Digital CDR With DFE and CTLE in 28-nm CMOS

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Published in 2017 at "IEEE Journal of Solid-State Circuits"

DOI: 10.1109/jssc.2017.2744661

Abstract: This paper presents a referenceless baud-rate clock and data recovery (CDR) incorporated with a continuous-time linear equalizer (CTLE) and one-tap decision feedback equalizer (DFE) to achieve data rates from 22.5 to 32 Gb/s across a… read more here.

Keywords: cdr; frequency; referenceless baud; baud rate ... See more keywords

A 15-Gb/s Sub-Baud-Rate Digital CDR

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Published in 2019 at "IEEE Journal of Solid-State Circuits"

DOI: 10.1109/jssc.2018.2885540

Abstract: This paper presents a sub-baud-rate clock and data recovery (CDR) circuit that can recover clock and data using only differential quarter-rate clocks. A combination of eight samplers and an integrator recover four data bits in… read more here.

Keywords: sub baud; baud rate; rate; clock ... See more keywords
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Design Techniques for 48-Gb/s 2.4-pJ/b PAM-4 Baud-Rate CDR With Stochastic Phase Detector

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Published in 2022 at "IEEE Journal of Solid-State Circuits"

DOI: 10.1109/jssc.2022.3189663

Abstract: This article presents design techniques for a PAM-4 baud-rate digital clock and data recovery (CDR) circuit utilizing a stochastic phase detector (SPD). The proposed baud-rate phase detector (PD) is designed in an inductive and stochastic… read more here.

Keywords: baud rate; rate; phase detector; phase ... See more keywords

Robust Timing Error Detection for Multilevel Baud-Rate CDR

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Published in 2022 at "IEEE Transactions on Circuits and Systems I: Regular Papers"

DOI: 10.1109/tcsi.2022.3191740

Abstract: Baud rate timing recovery, for which the Mueller-Muller approach is the most prominent, has become the mainstay of high speed serial links because of the simplicity of its implementation. The foundations of Mueller-Muller - Type… read more here.

Keywords: baud rate; cdr; timing error;
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A 6.0–11.0 Gb/s Reference-Less Sub-Baud-Rate Linear CDR With Wide-Range Frequency Acquisition Technique

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Published in 2023 at "IEEE Transactions on Circuits and Systems II: Express Briefs"

DOI: 10.1109/tcsii.2022.3169006

Abstract: A reference-less sub-baud-rate linear clock and data recovery with a frequency acquisition is proposed to operate from 6 to 11 Gb/s. The proposed frequency acquisition technique operating at a single differential quarter-rate clock and sharing… read more here.

Keywords: rate linear; baud rate; frequency; sub baud ... See more keywords

A 1.45-pJ/b 16-Gb/s Edge-Based Sub-Baud-Rate Digital CDR Circuit

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Published in 2022 at "IEEE Transactions on Circuits and Systems II: Express Briefs"

DOI: 10.1109/tcsii.2022.3200979

Abstract: A 16-Gb/s edge-based sub-baud-rate digital clock and data recovery (CDR) circuit is presented. By using the proposed edge-based sub-baud-rate technique and a passive high-pass filter, the complementary clocks are used to save the power. To… read more here.

Keywords: baud rate; cdr circuit; rate; sub baud ... See more keywords
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A 12-Gb/s Baud-Rate Clock and Data Recovery With 75% Phase-Detection Probability by Precoding and Integration-Hold-Reset Frontend

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Published in 2023 at "IEEE Transactions on Circuits and Systems II: Express Briefs"

DOI: 10.1109/tcsii.2022.3212881

Abstract: This brief describes a 12-Gb/s quarter-rate receiver with a current-integrating baud-rate clock and data recovery (CDR) technique. The proposed CDR receives a pre-encoded non-return-to-zero (NRZ) data stream and integrates with 0.5-UI phase offset to extract… read more here.

Keywords: rate clock; phase; baud rate; rate ... See more keywords

Asynchronous Physical-Layer Network Coding: Symbol Misalignment Estimation and Its Effect on Decoding

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Published in 2017 at "IEEE Transactions on Wireless Communications"

DOI: 10.1109/twc.2017.2732348

Abstract: In asynchronous physical-layer network coding (APNC) systems, the symbols from multiple transmitters to a common receiver may be misaligned. Knowledge of the amount of symbol misalignment, hence its estimation, is important to PNC decoding. This… read more here.

Keywords: symbol misalignment; estimation; baud rate; rate ... See more keywords

Joint equalization of EEPN, RSOP, and CD with the sliding window assisted extended Kalman filter for a high baud rate Stokes vector direct detection system.

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Published in 2023 at "Applied optics"

DOI: 10.1364/ao.478725

Abstract: Equalization-enhanced phase noise (EEPN) has emerged as one of the major impairments that cannot be ignored for a high baud rate Stokes vector direct detection (SVDD) system. When EEPN interacts with the rotation of state-of-polarization… read more here.

Keywords: system; baud rate; eepn; rsop ... See more keywords

Transmitter skew tolerance and spectral efficiency tradeoff in high baud-rate QAM optical communication systems.

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Published in 2018 at "Optics express"

DOI: 10.1364/oe.26.015045

Abstract: Residual IQ skew in a coherent transmitter severely degrades the performance of long-haul coherent optical communication systems. The impairment is particularly detrimental for a high baud-rate system using quadrature amplitude modulation (QAM). Furthermore, Nyquist pulse… read more here.

Keywords: baud rate; high baud; spectral efficiency;