Coded Eight-Dimensional QAM Technique Using Iterative Soft-Output Decoding and Its Demonstration in High Baud-Rate Transmission
Sign Up to like & getrecommendations! Published in 2017 at "Journal of Lightwave Technology"
DOI: 10.1109/jlt.2017.2669919
Abstract: We proposed coded eight-dimensional (8-D) quadrature amplitude modulation (QAM) and experimentally demonstrated in high baud-rate transmission. Both high baud rate and multilevel modulation techniques are necessary for large capacity long haul transmission without increasing the… read more here.
Keywords: rate transmission; baud rate; transmission; high baud ... See more keywords
Hardware Efficient and Transceiver IQ Skew-Tolerant DSP Scheme Under Baud-Rate Sampling for Short-Reach Coherent Optical Interconnects
Sign Up to like & getrecommendations! Published in 2025 at "Journal of Lightwave Technology"
DOI: 10.1109/jlt.2025.3553299
Abstract: Coherent detection with baud-rate sampling is considered an effective solution for power-sensitive short-reach optical interconnects. To effectively address transceiver IQ skew under baud-rate sampling, this paper proposes a hardware-efficient and transceiver IQ skew-robust baud-rate DSP… read more here.
Keywords: scheme; transceiver skew; baud; baud rate ... See more keywords
A 22.5-to-32-Gb/s 3.2-pJ/b Referenceless Baud-Rate Digital CDR With DFE and CTLE in 28-nm CMOS
Sign Up to like & getrecommendations! Published in 2017 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2017.2744661
Abstract: This paper presents a referenceless baud-rate clock and data recovery (CDR) incorporated with a continuous-time linear equalizer (CTLE) and one-tap decision feedback equalizer (DFE) to achieve data rates from 22.5 to 32 Gb/s across a… read more here.
Keywords: cdr; frequency; referenceless baud; baud rate ... See more keywords
A 15-Gb/s Sub-Baud-Rate Digital CDR
Sign Up to like & getrecommendations! Published in 2019 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2018.2885540
Abstract: This paper presents a sub-baud-rate clock and data recovery (CDR) circuit that can recover clock and data using only differential quarter-rate clocks. A combination of eight samplers and an integrator recover four data bits in… read more here.
Keywords: sub baud; baud rate; rate; clock ... See more keywords
Design Techniques for 48-Gb/s 2.4-pJ/b PAM-4 Baud-Rate CDR With Stochastic Phase Detector
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2022.3189663
Abstract: This article presents design techniques for a PAM-4 baud-rate digital clock and data recovery (CDR) circuit utilizing a stochastic phase detector (SPD). The proposed baud-rate phase detector (PD) is designed in an inductive and stochastic… read more here.
Keywords: baud rate; rate; phase detector; phase ... See more keywords
A 52-Gb/s Low-Power PAM-4 Baud-Rate CDR Using Pattern-Based Phase Detector for Short-Reach Applications
Sign Up to like & getrecommendations! Published in 2025 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2024.3517841
Abstract: A four-level pulse amplitude modulation (PAM-4) baud-rate clock and data recovery (CDR) is proposed for a power-efficient receiver. The baud-rate CDR reduces the burden of multi-phase clock generation and distribution, thus reducing the power consumption… read more here.
Keywords: rate; phase detector; cdr; baud rate ... See more keywords
Robust Timing Error Detection for Multilevel Baud-Rate CDR
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Transactions on Circuits and Systems I: Regular Papers"
DOI: 10.1109/tcsi.2022.3191740
Abstract: Baud rate timing recovery, for which the Mueller-Muller approach is the most prominent, has become the mainstay of high speed serial links because of the simplicity of its implementation. The foundations of Mueller-Muller - Type… read more here.
Keywords: baud rate; cdr; timing error;
A Low-Jitter Phase Detection Technique With Asymmetric Weights in Multi-Level Baud-Rate CDR
Sign Up to like & getrecommendations! Published in 2024 at "IEEE Transactions on Circuits and Systems I: Regular Papers"
DOI: 10.1109/tcsi.2024.3393436
Abstract: A change from a non-return-to-zero (NRZ) signaling to a four-level pulse amplitude modulation (PAM-4) signaling causes various challenges in clock and data recovery (CDR) designs as well as analog-front-end (AFE) designs. A PAM-4 CDR with… read more here.
Keywords: swing transitions; rate; full swing; baud rate ... See more keywords
A 6.0–11.0 Gb/s Reference-Less Sub-Baud-Rate Linear CDR With Wide-Range Frequency Acquisition Technique
Sign Up to like & getrecommendations! Published in 2023 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2022.3169006
Abstract: A reference-less sub-baud-rate linear clock and data recovery with a frequency acquisition is proposed to operate from 6 to 11 Gb/s. The proposed frequency acquisition technique operating at a single differential quarter-rate clock and sharing… read more here.
Keywords: rate linear; baud rate; frequency; sub baud ... See more keywords
A 1.45-pJ/b 16-Gb/s Edge-Based Sub-Baud-Rate Digital CDR Circuit
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2022.3200979
Abstract: A 16-Gb/s edge-based sub-baud-rate digital clock and data recovery (CDR) circuit is presented. By using the proposed edge-based sub-baud-rate technique and a passive high-pass filter, the complementary clocks are used to save the power. To… read more here.
Keywords: baud rate; cdr circuit; rate; sub baud ... See more keywords
A 12-Gb/s Baud-Rate Clock and Data Recovery With 75% Phase-Detection Probability by Precoding and Integration-Hold-Reset Frontend
Sign Up to like & getrecommendations! Published in 2023 at "IEEE Transactions on Circuits and Systems II: Express Briefs"
DOI: 10.1109/tcsii.2022.3212881
Abstract: This brief describes a 12-Gb/s quarter-rate receiver with a current-integrating baud-rate clock and data recovery (CDR) technique. The proposed CDR receives a pre-encoded non-return-to-zero (NRZ) data stream and integrates with 0.5-UI phase offset to extract… read more here.
Keywords: rate clock; phase; baud rate; rate ... See more keywords