Design and Analysis of Approximate Redundant Binary Multipliers
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DOI: 10.1109/tc.2018.2890222
Abstract: As technology scaling is reaching its limits, new approaches have been proposed for computional efficiency. Approximate computing is a promising technique for high performance and low power circuits as used in error-tolerant applications. Among approximate… read more here.
Keywords: binary multipliers; approximate redundant; approximate booth; redundant binary ... See more keywords
Comparative analysis of different Vedic algorithms for 8 × 8 binary multipliers
Sign Up to like & getrecommendations! Published in 2019 at "International Journal of Industrial and Systems Engineering"
DOI: 10.1504/ijise.2019.10024258
Abstract: Multipliers are the basic building blocks of various processors; arithmetic and logical unit and they are widely used in digital signal processing and image processing applications such as convolution, DWT, DCT. In this paper, four… read more here.
Keywords: comparative analysis; vedic algorithms; different vedic; algorithms binary ... See more keywords