Enabling In-Memory Computations in Non-Volatile SRAM Designs
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DOI: 10.1109/jetcas.2022.3174148
Abstract: The rapid growth in development of neural networks has necessitated the requirement of large capacity on-chip SRAM’s for Machine Learning accelerators. This has resulted in SRAM’s occupying significant portion of the die area. Furthermore, due… read more here.
Keywords: sram; enabling memory; rram; bitcell ... See more keywords