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Published in 2020 at "Circuits, Systems, and Signal Processing"
DOI: 10.1007/s00034-019-01065-6
Abstract: Network on chip is widely restricted with power utilization and area occupation due to the usage of buffers. Hence, the design of bufferless architecture entirely eliminates such kind of limitations. However, conventional methodologies will not…
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Keywords:
ant lion;
bufferless routing;
power;
chip ... See more keywords