Articles with "buried layer" as a keyword



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Dislocation formation from one inclined free-surface of a buried layer in a matrix

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Published in 2018 at "International Journal of Solids and Structures"

DOI: 10.1016/j.ijsolstr.2018.05.003

Abstract: Abstract The introduction of a dislocation from one lateral surface of a two-dimensional buried layer embedded in a matrix has been theoretically investigated in the interfaces between the two materials. It is found that the… read more here.

Keywords: buried layer; layer; dislocation; surface ... See more keywords
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A novel superjunction lateral double-diffused MOS with segmented buried P-layer

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Published in 2018 at "Superlattices and Microstructures"

DOI: 10.1016/j.spmi.2018.01.019

Abstract: Abstract A novel superjunction (SJ) lateral double-diffused MOS (LDMOS) with charge compensation to obtain an ultralow specific on-resistance (Ron,sp) is proposed in this paper. Segmented Buried P-layer(SBP)SJ LDMOS introduces segmented buried P-layer between the drift… read more here.

Keywords: buried layer; segmented buried; layer; charge ... See more keywords
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Bipolar AC (Bipac) Switch With Buried Layer for Specific AC Mains Applications

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Published in 2020 at "IEEE Transactions on Electron Devices"

DOI: 10.1109/ted.2020.2984200

Abstract: A new vertical bipolar bidirectional switch (Bipac) with a buried layer is proposed for specific ac mains applications (230 V–50 Hz). It is mainly dedicated for the low load current ones (0.5 $\text{A}_{\text {rms}}$ )… read more here.

Keywords: specific mains; buried layer; bipolar bipac; mains applications ... See more keywords
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Ultra-Low Specific On-resistance Lateral Double-Diffused Metal-Oxide-Semiconductor Transistor with Enhanced Dual-Gate and Partial P-buried Layer

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Published in 2019 at "Nanoscale Research Letters"

DOI: 10.1186/s11671-019-2866-5

Abstract: An ultra-low specific on-resistance (Ron,sp) lateral double-diffused metal-oxide-semiconductor transistor (LDMOS) with enhanced dual-gate and partial P-buried layer is proposed and investigated in this paper. On-resistance analytical model for the proposed LDMOS is built to provide… read more here.

Keywords: buried layer; partial buried; dual gate; resistance ... See more keywords