A 3-D Device-Level Investigation of a Lag-Free PPD Pixel With a Capacitive Deep Trench Isolation as Shared Vertical Transfer Gate
Sign Up to like & getrecommendations! Published in 2018 at "IEEE Transactions on Electron Devices"
DOI: 10.1109/ted.2018.2863682
Abstract: The application of capacitive deep trench isolation (CDTI) as a shared vertical transfer gate (VTG) in a back-side-illuminated CMOS image sensor pixel is investigated using 3-D device-level simulations. The parasitic capacitance existence between CDTI and… read more here.
Keywords: cdti; transfer; device level; capacitive deep ... See more keywords
Capacitive Deep Trench Interface Characterizations and Dark Current Modeling for Photogate Pixels
Sign Up to like & getrecommendations! Published in 2025 at "IEEE Transactions on Electron Devices"
DOI: 10.1109/ted.2024.3501255
Abstract: In a CMOS image sensor, the total dark current (DC) is the sum of several contributions that are difficult to discriminate, even if activation energies are extracted. For example, when considering the interface generation, there… read more here.
Keywords: trench interface; capacitive deep; dark current; deep trench ... See more keywords