Articles with "charge domain" as a keyword



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High Precision Mix‐Signal Capacitor Mismatch Error Calibration Method for Charge‐Domain Pipelined ADC

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Published in 2019 at "Chinese Journal of Electronics"

DOI: 10.1049/cje.2019.01.008

Abstract: A mix-signal high precision capacitor mismatch error calibration method for charge domain pipelined ADCs is proposed. The calibration method calibrates the capacitors one by one based on binary search. Charge errors caused by the capacitor… read more here.

Keywords: calibration; domain pipelined; capacitor mismatch; calibration method ... See more keywords
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CAP-RAM: A Charge-Domain In-Memory Computing 6T-SRAM for Accurate and Precision-Programmable CNN Inference

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Published in 2021 at "IEEE Journal of Solid-State Circuits"

DOI: 10.1109/jssc.2021.3056447

Abstract: A compact, accurate, and bitwidth-programmable in-memory computing (IMC) static random-access memory (SRAM) macro, named CAP-RAM, is presented for energy-efficient convolutional neural network (CNN) inference. It leverages a novel charge-domain multiply-and-accumulate (MAC) mechanism and circuitry to… read more here.

Keywords: inference; charge domain; memory; cap ram ... See more keywords
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An In-Memory-Computing Charge-Domain Ternary CNN Classifier

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Published in 2023 at "IEEE Journal of Solid-State Circuits"

DOI: 10.1109/jssc.2023.3238725

Abstract: The article presents a charge-domain computing ternary neural network (TNN) classifier with a complete four-layer neural network (NN) on a chip. The proposed ternary network provides 1.5-b resolution (0/+1/−1) for weights and activations, leading to… read more here.

Keywords: inline formula; charge domain; tex math;
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A 2941-TOPS/W Charge-Domain 10T SRAM Compute-in-Memory for Ternary Neural Network

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Published in 2023 at "IEEE Transactions on Circuits and Systems I: Regular Papers"

DOI: 10.1109/tcsi.2023.3241385

Abstract: In this paper, we present a 10T SRAM compute-in memory (CiM) macro to process the multiplication-accumulation (MAC) operations between ternary-inputs and binary-weights. In the proposed 10T SRAM bitcell, the charge-domain analog computations are employed to… read more here.

Keywords: neural network; 2941 tops; charge domain; 10t sram ... See more keywords
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A 28 nm 16 Kb Bit-Scalable Charge-Domain Transpose 6T SRAM In-Memory Computing Macro

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Published in 2023 at "IEEE Transactions on Circuits and Systems I: Regular Papers"

DOI: 10.1109/tcsi.2023.3244338

Abstract: This article presents a compact, robust, and transposable SRAM in-memory computing (IMC) macro to support feed forward (FF) and back propagation (BP) computation within a single macro. The transpose macro is created with a clustering… read more here.

Keywords: macro; inline formula; charge domain; tex math ... See more keywords