Reservoir Computing with Charge-trap Memory Based on a MoS2 Channel for Neuromorphic Engineering.
Sign Up to like & getrecommendations! Published in 2022 at "Advanced materials"
DOI: 10.1002/adma.202205381
Abstract: Novel memory devices are essential for developing low power, fast and accurate in-memory computing and neuromorphic engineering concepts that can compete with the conventional CMOS digital processors. 2D semiconductors provide a novel platform for advanced… read more here.
Keywords: mos2 channel; neuromorphic engineering; trap memory; charge trap ... See more keywords
Dielectric-Engineered High-Speed, Low-Power, Highly Reliable Charge Trap Flash-Based Synaptic Device for Neuromorphic Computing beyond Inference.
Sign Up to like & getrecommendations! Published in 2023 at "Nano letters"
DOI: 10.1021/acs.nanolett.2c03453
Abstract: The coming of the big-data era brought a need for power-efficient computing that cannot be realized in the Von Neumann architecture. Neuromorphic computing which is motivated by the human brain can greatly reduce power consumption… read more here.
Keywords: low power; neuromorphic computing; power; trap flash ... See more keywords
Integration of Quantum Dot Light-Emitting Diodes and Charge Trap Thin-Film Transistor Arrays for Memory-In-Pixel Applications.
Sign Up to like & getrecommendations! Published in 2025 at "ACS applied materials & interfaces"
DOI: 10.1021/acsami.5c13831
Abstract: The advancement of ultrahigh-resolution displays and extended reality applications has driven increasing demand for compact and low-power device architectures capable of simultaneously performing memory and light-emission functions at the pixel level. To address this need,… read more here.
Keywords: memory; trap thin; pixel; charge trap ... See more keywords
Nanoscale mapping of edge-state conductivity and charge-trap activity in topological insulators.
Sign Up to like & getrecommendations! Published in 2023 at "Materials horizons"
DOI: 10.1039/d2mh01259f
Abstract: We report the nanoscale mapping of topological edge-state conductivity and the effects of charge-traps on conductivity in a Bi2Se3 multilayer film under ambient conditions. In this strategy, we applied an electric field perpendicular to the… read more here.
Keywords: edge state; charge; charge trap; conductivity ... See more keywords
Direct measurement of charge trap depth in polymer nanocomposites
Sign Up to like & getrecommendations! Published in 2023 at "Journal of Physics D: Applied Physics"
DOI: 10.1088/1361-6463/acd1fa
Abstract: Polymer nanocomposites (PNCs) exhibit excellent electrical properties owing to charge trapping provided by nanofillers. However, the role of nanofillers in trap formation at the microscopic level is poorly understood. In this study, we propose a… read more here.
Keywords: trap depth; polymer nanocomposites; charge; charge trap ... See more keywords
In2Ga2ZnO7 oxide semiconductor based charge trap device for NAND flash memory.
Sign Up to like & getrecommendations! Published in 2018 at "Nanotechnology"
DOI: 10.1088/1361-6528/aaadf7
Abstract: The programming characteristics of charge trap flash memory device adopting amorphous In2Ga2ZnO7 (a-IGZO) oxide semiconductors as channel layer were evaluated. Metal-organic chemical vapor deposition (MOCVD) and RF-sputtering processes were used to grow a 45 nm… read more here.
Keywords: charge trap; charge; flash memory; spectroscopy ... See more keywords
Design of high performance MoS 2 -based non-volatile memory via ion beam defect engineering
Sign Up to like & getrecommendations! Published in 2019 at "2D Materials"
DOI: 10.1088/2053-1583/ab115c
Abstract: Nonvolatile charge trap memory is an important part of the continuous development of information technology. As a 2-dimensional (2D) material with fantastic physical characteristics, molybdenum disulfide (MoS2) has been receiving extensive attention for its potential… read more here.
Keywords: trap gate; performance; memory; charge trap ... See more keywords
Adaptive Artificial Neural Network-Coupled LDPC ECC as Universal Solution for 3-D and 2-D, Charge-Trap and Floating-Gate NAND Flash Memories
Sign Up to like & getrecommendations! Published in 2019 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2018.2884949
Abstract: Adaptive artificial neural network (ANN)-coupled low-density parity-check (LDPC) error-correcting code (ECC) (ANN-LDPC ECC) is proposed to increase acceptable errors for various NAND flash memories. The proposed ANN-LDPC ECC can be the universal solutions for 3-D… read more here.
Keywords: ldpc; ann ldpc; charge trap; floating gate ... See more keywords
Areal Geometric Effects of a ZnO Charge-Trap Layer on Memory Transistor Operations for Embedded-Memory Circuit Applications
Sign Up to like & getrecommendations! Published in 2017 at "IEEE Electron Device Letters"
DOI: 10.1109/led.2017.2729578
Abstract: The areal geometric effects of a ZnO charge-trap layer (CTL) on the device characteristics of a charge-trap memory thin-film transistor were investigated for embedded-memory circuit applications. While the device with a larger overlapped region between… read more here.
Keywords: effects zno; areal geometric; charge trap; geometric effects ... See more keywords
Channel Conductance Modulation of Dual-Gate Charge-Trap Oxide Synapse TFT Using In-Ga-Zn-O Channel and ZnO Trap Layers
Sign Up to like & getrecommendations! Published in 2020 at "IEEE Electron Device Letters"
DOI: 10.1109/led.2020.3023138
Abstract: Synaptic operations of all-oxide based charge-trap oxide synapse TFTs using dual-gate configuration (DG CTOx-STFTs) were demonstrated. Short-term plasticity of biological synapses were successfully mimicked by paired-pulse facilitation. Furthermore, by adopting an incremental step potentiation pulse… read more here.
Keywords: charge trap; trap; oxide synapse; trap oxide ... See more keywords
AND Flash Array Based on Charge Trap Flash for Implementation of Convolutional Neural Networks
Sign Up to like & getrecommendations! Published in 2020 at "IEEE Electron Device Letters"
DOI: 10.1109/led.2020.3025587
Abstract: Various memory devices have been proposed for implementing synapse devices in neuromorphic systems. In this letter, an AND flash array based on charge trap flash (CTF) memory was proposed. CTF-based synapse devices are particularly suitable… read more here.
Keywords: array; charge trap; flash array; trap flash ... See more keywords