Improving the Diagnosability of Scan Chain Faults Under Transparent-Scan by Observation Points
Sign Up to like & getrecommendations! Published in 2018 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2017.2748020
Abstract: Observation points in the combinational logic of a circuit can aid in the diagnosis of logic defects by reducing the number of indistinguished fault pairs. This paper considers the use of observation points in the… read more here.
Keywords: chain; chain faults; combinational logic; observation points ... See more keywords
Low-Variance Memristor-Based Multi-Level Ternary Combinational Logic
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Transactions on Circuits and Systems I: Regular Papers"
DOI: 10.1109/tcsi.2022.3151920
Abstract: This paper presents a series of multi-stage hybrid memristor-CMOS ternary combinational logic stages that are optimized for reducing silicon area occupation. Prior demonstrations of memristive logic are typically constrained to single-stage logic due to the… read more here.
Keywords: low variance; variance memristor; combinational logic; memristor ... See more keywords