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Published in 2025 at "Advanced Electronic Materials"
DOI: 10.1002/aelm.202500496
Abstract: In this work, a compact model for mushroom‐type phase‐change memory devices is introduced that incorporates the shape and size of the amorphous mark under different programming conditions, and is applicable to both projecting and non‐projecting…
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Keywords:
type phase;
mushroom type;
model;
model mushroom ... See more keywords
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Published in 2021 at "Solid-state Electronics"
DOI: 10.1016/j.sse.2021.107960
Abstract: Abstract Z2-FET, a partially gated diode, was explored for ESD protection due to its sharp switching behavior and is also a promising candidate for 1T-DRAM application. Based on detailed TCAD simulations, we develop a pragmatic…
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Keywords:
compact model;
memory operation;
memory;
model including ... See more keywords
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Published in 2024 at "IEEE Journal of the Electron Devices Society"
DOI: 10.1109/jeds.2023.3346380
Abstract: The artificial neural network (ANN)-based compact model has significant advantages over physics-based standard compact models such as BSIM-CMG because it can achieve higher accuracy over a wide range of geometric parameters. This makes it particularly…
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Keywords:
based compact;
binning method;
model;
compact model ... See more keywords
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Published in 2019 at "IEEE Electron Device Letters"
DOI: 10.1109/led.2019.2901754
Abstract: A physics-based compact model for retention behaviors of conductive-bridge random access memory (CBRAM) is developed by modeling: 1) the material-dependent metal atom transport from the conductive filament into the electrolyte; and 2) the conduction percolation…
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Keywords:
compact model;
percolation;
physics;
retention behaviors ... See more keywords
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Published in 2023 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2022.3172599
Abstract: This brief presents a compact model to capture the major difference between high-voltage (HV) and low-voltage MOSFETs, i.e., the carrier velocity saturation effect in the drift region of HV MOSFETs. We discuss the numerical and…
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Keywords:
high voltage;
voltage;
model;
compact model ... See more keywords
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Published in 2017 at "IEEE Transactions on Electron Devices"
DOI: 10.1109/ted.2016.2643162
Abstract: HfOx-based resistive switching device has been explored as one of the promising candidates for the electronic synapses of neuromorphic computing systems due to its high performance, low cost, and compatibility with CMOS technology. To meet…
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Keywords:
based electronic;
compact model;
neuromorphic computing;
hfox based ... See more keywords
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Published in 2018 at "IEEE Transactions on Electron Devices"
DOI: 10.1109/ted.2018.2801025
Abstract: A core scheme including dc and capacitance models of amorphous indium gallium zinc oxide thin-film transistors is presented based on terms of surface potential. Due to the intrinsic physical fact, carrier degeneracy is taken into…
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Keywords:
igzo tfts;
compact model;
model;
core compact ... See more keywords
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Published in 2019 at "IEEE Transactions on Electron Devices"
DOI: 10.1109/ted.2019.2937159
Abstract: In this brief, we upgrade our initial drain current compact model for triple-gate junctionless transistors (JLTs) to a continuous model satisfying the source/drain (S/D) symmetry. This is achieved by reformulating the key equations of our…
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Keywords:
compact model;
triple gate;
current compact;
drain current ... See more keywords
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Published in 2020 at "IEEE Transactions on Electron Devices"
DOI: 10.1109/ted.2020.2988858
Abstract: Due to the increasing importance and complexity of source/drain parasitic resistance (Rsd) in nanoscale CMOS technology and circuit design, a predictive 3-D structure-aware Rsd compact model is developed and comprehensively validated in respect of 7-nm…
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Keywords:
compact model;
sub sub;
resistance;
model ... See more keywords
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Published in 2024 at "IEEE Transactions on Electron Devices"
DOI: 10.1109/ted.2024.3439308
Abstract: The nonlinearity and variation of the conductance tunning in resistive switching devices pose challenges in writing discrete levels to multibit cells for data storage and to artificial synapses for neuromorphic applications. Therefore, it is crucial…
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Keywords:
compact modeling;
conductance;
compact model;
modeling pulse ... See more keywords
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Published in 2024 at "IEEE Transactions on Electron Devices"
DOI: 10.1109/ted.2024.3469170
Abstract: In this article, a compact model of the dc characteristics of organic electrochemical transistors (OECTs) is proposed. Starting from the output characteristics, the transconductance in the saturation regime is modeled after the output conductance in…
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Keywords:
transistors oects;
organic electrochemical;
electrochemical transistors;
model ... See more keywords