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Published in 2020 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2020.2981020
Abstract: High speed data converter architectures such as pipelined analog-to-digital-converters (ADCs) typically consist of large capacitor arrays that are highly susceptible to systematic errors. Although significant efforts have been made in the literature to compensate linear…
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Keywords:
compensation mdacs;
technique;
linearity;
gradient error ... See more keywords