A Compile-Time Framework for Tolerating Read Disturbance in STT-RAM
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DOI: 10.1109/tcad.2020.3023666
Abstract: Spin-transfer torque magnetic random access memory (STT-RAM) is one of the most promising candidates for next-generation on-chip memories. While STT-RAM offers high density, negligible leakage power, and fast access speed, it also suffers from read-disturbance… read more here.
Keywords: read disturbance; framework; stt ram; compile time ... See more keywords