LAUSR

Cross-Corner Delay Variation Model for Standard Cell Libraries

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1 Published in 2021 at "IEEE Access"

DOI: 10.1109/access.2021.3080294

Abstract: For timing closure of logic circuits, circuit designers must perform sign-offs on a variety of process, voltage, and temperature (PVT) conditions. Designs of advanced logic circuits involve a multitude of voltage islands and operating modes,… read more here.

Keywords: cross corner; characterization; corner; delay ... See more keywords