A 28.4–30.5‐Gb/s Reference‐Less Full‐Rate Clock and Data Recovery With Current Mismatch Elimination in 28‐nm CMOS
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DOI: 10.1002/mop.70467
Abstract: This paper reports a full‐rate reference‐less bang‐bang clock and data recovery (BBCDR) circuit with current mismatch elimination functionality. Specifically, a simplified frequency acquisition loop (FAL) based on lock detection (LD) is proposed to achieve efficient… read more here.
Keywords: rate; clock data; mismatch elimination; current mismatch ... See more keywords