Articles with "current steering" as a keyword



A CMOS Current Steering Neurostimulation Array With Integrated DAC Calibration and Charge Balancing

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Published in 2017 at "IEEE Transactions on Biomedical Circuits and Systems"

DOI: 10.1109/tbcas.2016.2609854

Abstract: An 8-channel current steerable, multi-phasic neural stimulator with on-chip current DAC calibration and residue nulling for precise charge balancing is presented. Each channel consists of two sub-binary radix DACs followed by wide-swing, high output impedance… read more here.

Keywords: stimulation; charge balancing; dac calibration; current steering ... See more keywords
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Digital Background Calibration of a Split Current-Steering DAC

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Published in 2019 at "IEEE Transactions on Circuits and Systems I: Regular Papers"

DOI: 10.1109/tcsi.2019.2901626

Abstract: A digital background calibration method for a current-steering digital-to-analog converter (DAC) is presented. The algorithm uses one comparator for calibration and corrects for current-source mismatch, which causes DAC nonlinearity. The DAC is split into two… read more here.

Keywords: calibration; calibration split; current steering; digital background ... See more keywords
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Analysis and Calibration for Wideband Times-2 Interleaved Current-Steering DACs

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Published in 2022 at "IEEE Transactions on Circuits and Systems I: Regular Papers"

DOI: 10.1109/tcsi.2022.3193659

Abstract: This work presents analysis and calibration of interleaving and data timing errors that are encountered in modern times-2 interleaved digital-to-analog converters (DACs) with a current-steering (CS) architecture. Such errors corrupt the DAC output spectrum with… read more here.

Keywords: analysis calibration; times interleaved; calibration wideband; calibration ... See more keywords
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A Self-Calibrated Cryogenic Current Cell for 4.2 K Current Steering D/A Converters

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Published in 2017 at "IEEE Transactions on Circuits and Systems II: Express Briefs"

DOI: 10.1109/tcsii.2016.2631489

Abstract: This brief presents a cryogenic CMOS unit current cell operating from room temperature down to 4.2 K, and it is primarily designed for low temperature current steering (CS) D/A converters (DACs). A novel structure along… read more here.

Keywords: cell; current steering; current cell; tex math ... See more keywords
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High SFDR Current-Steering DAC With Splitting-and-Binary Segmented Architecture and Dynamic-Element-Matching Technique

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Published in 2022 at "IEEE Transactions on Circuits and Systems II: Express Briefs"

DOI: 10.1109/tcsii.2022.3188445

Abstract: This brief presents a current-steering digital-to-analog converter (DAC) with “4-bit splitting +8-bit binary” segmented topology. The proposed splitting decoding method can optimize the differential nonlinearity and output glitches of the DAC with a more simplified… read more here.

Keywords: topology; binary segmented; current steering; dynamic element ... See more keywords