Nanowire-Aware Routing Considering High Cut Mask Complexity
Sign Up to like & getrecommendations! Published in 2017 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2016.2614777
Abstract: 1-D nanowires are one of the most promising next-generation lithography technologies for 7 nm process node and beyond. The 1-D nanowire process first constructs a 1-D nanoarray through template synthesis followed by line-end cutting with… read more here.
Keywords: cut mask; nanowire aware; aware routing; cut ... See more keywords
Cut Mask Optimization With Wire Planning in Self-Aligned Multiple Patterning Full-Chip Routing
Sign Up to like & getrecommendations! Published in 2017 at "IEEE Transactions on Very Large Scale Integration (VLSI) Systems"
DOI: 10.1109/tvlsi.2016.2600681
Abstract: Because of the delay of the next-generation lithography technologies, self-aligned double patterning (SADP) has become one of the major lithography solutions for sub-20-nm technology nodes. For advanced sub-10-nm nodes, self-aligned quadruple patterning (SAQP) or even… read more here.
Keywords: self aligned; cut mask; wire planning;