Hardware Accelerated Vision Transformer via Heterogeneous Architecture Design and Adaptive Dataflow Mapping
Sign Up to like & getrecommendations! Published in 2025 at "IEEE Transactions on Computers"
DOI: 10.1109/tc.2024.3517751
Abstract: Vision transformer (ViT) models have demonstrated remarkable advantages in visual tasks. However, the ViT model contains various types of operators, and its sophisticated model structure imposes substantial computational complexity and storage burden. Existing hardware solutions… read more here.
Keywords: architecture; architecture design; heterogeneous architecture; dataflow mapping ... See more keywords
INDM: Chiplet-Based Interconnect Network and Dataflow Mapping for DNN Accelerators
Sign Up to like & getrecommendations! Published in 2024 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2023.3332832
Abstract: Chiplet-based deep neural network (DNN) accelerator is a promising solution to balance the performance and manufacturing cost. However, different from monolithic chips, interconnect network design and architectural partitioning for multiple chiplets would result in a… read more here.
Keywords: chiplet based; dnn; network; dataflow mapping ... See more keywords