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Published in 2019 at "Analog Integrated Circuits and Signal Processing"
DOI: 10.1007/s10470-019-01413-1
Abstract: This letter presents a harmonic-mode PLL (H-PLL) that avoids additional multiplication, filtering, and amplification stages and thus results in an area-efficient implementation. A proof-of-concept 57.5-mW 65-nm CMOS PLL prototype operating at 171 GHz provides − 14.2 dBm…
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Keywords:
mode pll;
pll;
harmonic mode;
dbm output ... See more keywords
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Published in 2021 at "IEEE Microwave and Wireless Components Letters"
DOI: 10.1109/lmwc.2020.3037515
Abstract: This letter presents the design and characterization of two 60-GHz voltage-controlled oscillators (VCOs) fabricated in a 22-nm fully depleted silicon on insulator (FDSOI) CMOS technology with over 15-dBm output power. Both VCOs rely on the…
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Keywords:
two ghz;
dbm output;
output power;
power vcos ... See more keywords