A 32 Gb/s, 4.7 pJ/bit Optical Link With −11.7 dBm Sensitivity in 14-nm FinFET CMOS
Sign Up to like & getrecommendations! Published in 2018 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2017.2778280
Abstract: This paper presents a 32 Gb/s non-return-to-zero optical link using 850-nm vertical-cavity surface-emitting laser-based multi-mode optics with 14-nm bulk FinFET CMOS circuits. The target application is the integration of optics on to the first-level package,… read more here.
Keywords: optical link; dbm sensitivity; link; finfet cmos ... See more keywords
A 112-Gb/s —8.2-dBm Sensitivity 4-PAM Linear TIA in 16-nm CMOS With Co-Packaged Photodiodes
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DOI: 10.1109/jssc.2022.3218558
Abstract: A flip-chip co-packaged linear transimpedance amplifier (TIA) in 16-nm fin field effect transistor (FinFET) CMOS demonstrating 112-Gb/s four-level pulse-amplitude modulation (4-PAM) with −8.2-dBm sensitivity is presented in support for optical receivers required in the next-generation… read more here.
Keywords: tex math; inline formula; dbm sensitivity; pam ... See more keywords
A 10-Gb/s −18.8 dBm Sensitivity 5.7 mW Fully-Integrated Optoelectronic Receiver With Avalanche Photodetector in 0.13- $\mu$ m CMOS
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DOI: 10.1109/tcsi.2019.2909284
Abstract: Avalanche photodetectors (APDs) improve the sensitivity of optoelectronic (O/E) receivers (RXs) due to their high multiplication gain and responsivity. When implemented monolithically with a CMOS transimpedance amplifier (TIA) on the same chip, they provide further… read more here.
Keywords: fully integrated; avalanche; sensitivity fully; sensitivity ... See more keywords