Articles with "decoder architecture" as a keyword



Minimal-Set Trellis Min-Max Decoder Architecture for Nonbinary LDPC Codes

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Published in 2021 at "IEEE Transactions on Circuits and Systems II: Express Briefs"

DOI: 10.1109/tcsii.2020.3011220

Abstract: Nonbinary low-density parity-check (NB-LDPC) codes offer a superior error correction capability compared to the existing binary counterparts. However, there exist two major disadvantages in NB-LDPC decoders that they require substantial hardware resources, particularly at the… read more here.

Keywords: ldpc; decoder architecture; ldpc codes; architecture ... See more keywords

RecNet: advanced encoder-decoder architecture for SHG-FROG pulse reconstruction with enhanced noise immunity and convergence.

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Published in 2025 at "Optics express"

DOI: 10.1364/oe.545087

Abstract: This paper presents RecNet, an innovative convolutional neural network designed for reconstructing cecond harmonic generation frequency-resolved optical gating (SHG-FROG) traces. Unlike conventional approaches, RecNet incorporates noiseless sample constraints through a domain knowledge embedded loss function,… read more here.

Keywords: decoder architecture; encoder decoder; shg frog;