Sign Up to like & get
recommendations!
0
Published in 2024 at "IEEE Access"
DOI: 10.1109/access.2024.3486057
Abstract: Small delay defects are caused by fabrication imperfections as well as chip aging, and detected by tests for path delay faults. Path delay faults that can cause failures during functional operation are especially important to…
read more here.
Keywords:
strong non;
delay faults;
non robust;
path delay ... See more keywords
Sign Up to like & get
recommendations!
0
Published in 2025 at "IEEE Access"
DOI: 10.1109/access.2025.3539981
Abstract: Advanced chip fabrication technologies are susceptible to defects of various types, including small delay defects that are modeled by path delay faults. Structural (scan-based) tests targeting the detection of hardware defects use scan chains to…
read more here.
Keywords:
delay faults;
path delay;
scan based;
based tests ... See more keywords
Sign Up to like & get
recommendations!
1
Published in 2019 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2018.2864255
Abstract: Marginal hardware introduces severe reliability threats throughout the life cycle of a system. Although marginalities may not affect the functionality of a circuit immediately after manufacturing, they can degrade into hard failures and must be…
read more here.
Keywords:
delay faults;
test;
test hidden;
built test ... See more keywords
Sign Up to like & get
recommendations!
2
Published in 2023 at "IEEE Transactions on Very Large Scale Integration (VLSI) Systems"
DOI: 10.1109/tvlsi.2022.3224361
Abstract: Path selection procedures identify path delay faults whose tests detect small delay defects. Path selection criteria are positive in the sense that they point to paths that should be selected, e.g., the longest paths. However,…
read more here.
Keywords:
procedure;
test generation;
delay faults;
path ... See more keywords