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Published in 2019 at "IEEE Access"
DOI: 10.1109/access.2019.2906884
Abstract: A fault-tolerant hardening-by-design frequency divider has been proposed for clock and data recovery in a 28-nm CMOS process. By means of the mandatory updating mechanism, the proposed divider can update the state of the D…
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Keywords:
design frequency;
fault tolerant;
tolerant hardening;
divider ... See more keywords