Articles with "digital circuits" as a keyword



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Minimum energy point tracking based on adaptive voltage scaling circuit

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Published in 2017 at "Analog Integrated Circuits and Signal Processing"

DOI: 10.1007/s10470-017-0986-3

Abstract: In order to realize the low-voltage and low-power dissipation designing of digital circuits, minimum energy point tracking (MEPT) based on adaptive voltage scaling (AVS) circuit is proposed in this paper. With process, voltage and temperature… read more here.

Keywords: voltage; energy; digital circuits; circuit ... See more keywords
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High-performance engineered gate transistor-based compact digital circuits

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Published in 2017 at "Electronics Letters"

DOI: 10.1049/el.2016.3899

Abstract: A novel method for designing and realising compact digital circuits by engineering MOSFET gate electrode is proposed. The novelty is the use of gate engineered single devices in the pull-up (PU) and pull-down (PD) paths… read more here.

Keywords: compact digital; engineered gate; digital circuits; gate ... See more keywords
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Superconductor digital circuits with π junctions alone

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Published in 2023 at "Applied Physics Letters"

DOI: 10.1063/5.0144604

Abstract: We adopt superconductor/ferromagnet/insulator/superconductor (SFIS) Josephson junctions (JJs) as both switching JJs and intrinsic π phase shifters in superconductor digital circuits. The critical current density (Jc) and characteristic voltage (Vc) of the SFIS junctions are about… read more here.

Keywords: junctions alone; superconductor digital; digital circuits; phase ... See more keywords
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SFQ Bias for SFQ Digital Circuits

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Published in 2021 at "IEEE Transactions on Applied Superconductivity"

DOI: 10.1109/tasc.2021.3067231

Abstract: Superconductor electronics fabrication technology developed at MIT Lincoln Laboratory enables the development of VLSI digital circuits with millions of Josephson junctions per square centimeter. However, conventional DC and multi-phase AC biasing techniques already encounter serious… read more here.

Keywords: sfq digital; scheme; sfq bias; digital circuits ... See more keywords
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Splitter-Aware Multiterminal Routing With Length-Matching Constraint for RSFQ Circuits

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Published in 2021 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"

DOI: 10.1109/tcad.2020.3042159

Abstract: Aided by the advancement of super-conductive materials, rapid single flux quantum (RSFQ) digital circuits are emerging as a promising complement or even replacement of the traditional CMOS digital integrated circuits. RSFQ digital circuits typically work… read more here.

Keywords: multiterminal routing; digital circuits; length matching; rsfq ... See more keywords
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Ultra-Sub-Threshold Operation of Always-On Digital Circuits for IoT Applications by Use of Schmitt Trigger Gates

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Published in 2017 at "IEEE Transactions on Circuits and Systems I: Regular Papers"

DOI: 10.1109/tcsi.2017.2705053

Abstract: Supply-voltage reduction in digital circuits beyond the minimum energy per operation point is advantageous for supply-voltage-constrained applications and can help to considerably reduce standby power consumption. Schmitt trigger (ST) logic allows for ultra-low voltage (ULV)… read more here.

Keywords: supply; digital circuits; supply voltage; operation ... See more keywords
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Application of Open-Hardware-Based Solutions for Rapid Transition From Stationary to the Remote Teaching Model During Pandemic

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Published in 2021 at "IEEE Transactions on Education"

DOI: 10.1109/te.2020.3043479

Abstract: Contribution: While research indicates usefulness of remote laboratories in teaching of digital hardware systems, their main application is to complement stationary classes. This work presents a low-cost, scalable architecture that supports rapid transformation of teaching… read more here.

Keywords: application open; hardware; model; teaching model ... See more keywords
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Device to Circuit Framework for Activity-Dependent NBTI Aging in Digital Circuits

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Published in 2019 at "IEEE Transactions on Electron Devices"

DOI: 10.1109/ted.2018.2882229

Abstract: A framework is proposed for activity-dependent timing degradation due to p-FET negative bias temperature instability (NBTI) in digital circuits. A fixed-time compact model is proposed for NBTI and validated with physical model predictions for various… read more here.

Keywords: device circuit; activity dependent; activity; degradation ... See more keywords
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A Tool for Digital Circuits Synthesis Based on Notification Oriented Paradigm

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Published in 2018 at "IEEE Latin America Transactions"

DOI: 10.1109/tla.2018.8444152

Abstract: FPGAs (Field Programmable Gate Arrays) are proving to be an alternative for applications that require great processing power because they allow parallelism. Still, the high-level synthesis tools allow professionals without hardware knowledge to use FPGAs.… read more here.

Keywords: high level; digital circuits; level; oriented paradigm ... See more keywords
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A 3-D Simulation-Based Approach to Analyze Heavy Ions-Induced SET on Digital Circuits

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Published in 2020 at "IEEE Transactions on Nuclear Science"

DOI: 10.1109/tns.2020.3006997

Abstract: Radiation-induced single-event transients (SETs) are the leading cause of mal-operations in CMOS nanometric integrated circuits. The increasing complexity of advanced CMOS digital circuits makes SET effects investigation a rising challenge. In this work, we propose… read more here.

Keywords: simulation based; heavy ion; approach; based approach ... See more keywords
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Designing Digital Circuits in Multi-Valued Logic

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Published in 2018 at "International Journal on Advanced Science, Engineering and Information Technology"

DOI: 10.18517/ijaseit.8.4.5966

Abstract: In the last few decades we have witnessed an increase in CPU performance, which has been made possible thanks to the increase in the clock frequency and the increase in the number of transistors in… read more here.

Keywords: designing digital; digital circuits; circuits multi; increase ... See more keywords