Analysis of Clock Scheduling in Frequency Domain for Digital Switching Noise Suppressions
Sign Up to like & getrecommendations! Published in 2018 at "IEEE Transactions on Very Large Scale Integration (VLSI) Systems"
DOI: 10.1109/tvlsi.2018.2830810
Abstract: This paper presents a methodology for digital switching noise suppressions on the power lines at a fundamental frequency as well as its harmonics by using a clock scheduling technique in the frequency domain. Our approach… read more here.
Keywords: switching noise; frequency; noise suppressions; noise ... See more keywords