Sidewall spacer layer engineering for improvement of analog/RF performance of nanoscale double-gate junctionless transistors
Sign Up to like & getrecommendations! Published in 2017 at "Microsystem Technologies"
DOI: 10.1007/s00542-016-3049-2
Abstract: We investigate the impact of sidewall spacers on the analog/RF performance of double gate junctionless transistors at channel length of 30 nm using extensive numerical device simulation. Furthermore, we report the performance of a common source… read more here.
Keywords: double gate; spacer; gain; analog performance ... See more keywords
Three-dimensional analytical modeling for small-geometry AlInSb/AlSb/InSb double-gate high-electron-mobility transistors (DG-HEMTs)
Sign Up to like & getrecommendations! Published in 2020 at "Journal of Computational Electronics"
DOI: 10.1007/s10825-020-01498-2
Abstract: A simple physics-based three-dimensional (3-D) analytical model for AlInSb/AlSb/InSb double-gate high-electron-mobility transistors (DG-HEMTs) is presented. The model accurately predicts the short-channel effects (SCEs) in the channel region for various device dimensions, viz. channel length and… read more here.
Keywords: double gate; alinsb alsb; geometry; alsb insb ... See more keywords
Linearity Performance Analysis of Double Gate (DG) VTFET Using HDB for RF Applications
Sign Up to like & getrecommendations! Published in 2020 at "Silicon"
DOI: 10.1007/s12633-020-00499-x
Abstract: In recent low-power electronics industry, Tunnel field-effect transistors (TFETs) have shown the superior performance such as decreased leakage current and lower subthreshold slope ( SS ). Previously available research work have recognized the fact that… read more here.
Keywords: linearity performance; linearity; double gate; analysis double ... See more keywords
Performance Improvement of Heterojunction Double Gate TFET with Gaussian Doping
Sign Up to like & getrecommendations! Published in 2020 at "Silicon"
DOI: 10.1007/s12633-020-00736-3
Abstract: A new Ge/SiGe heterojunction double-gate tunnel field effect transistor (DGT) model with hetero dielectric gate and Gaussian doping drain region is investigated for the first time. The introduction of heterojunction with hetero dielectric will reduce… read more here.
Keywords: double gate; frequency; gaussian doping; heterojunction double ... See more keywords
Impact of different localized trap charge profiles on the short channel double gate junctionless nanowire transistor based inverter and Ring Oscillator circuit
Sign Up to like & getrecommendations! Published in 2019 at "AEU - International Journal of Electronics and Communications"
DOI: 10.1016/j.aeue.2019.06.014
Abstract: Abstract In this paper, the reliability issues due to localized charges on Double Gate Junctionless Nanowire Transistor (DG-JNT) based circuits are investigated. The localized/fixed charges come into existence at the interface of substrate and oxide… read more here.
Keywords: charge profiles; double gate; nanowire transistor; circuit ... See more keywords
A modified pseudo 2D physically-based model for double-gate TFETs: Role of precise calculations of drain and source depletion regions
Sign Up to like & getrecommendations! Published in 2021 at "Ain Shams Engineering Journal"
DOI: 10.1016/j.asej.2021.06.025
Abstract: Abstract In this current study, a modified pseudo two-dimensional (2-D) semi-analytical model for double gate tunnel FETs (DG-TFETs) is introduced. The main regions in the DG-TFET structure are the channel and the depletion regions inside… read more here.
Keywords: model; double gate; source; modified pseudo ... See more keywords
Influence of gate leakage current induced shot noise on the Minimum Noise Figure of InAlAs/InGaAs double-gate HEMT
Sign Up to like & getrecommendations! Published in 2017 at "Superlattices and Microstructures"
DOI: 10.1016/j.spmi.2017.02.026
Abstract: Abstract In this paper, the influence of hot electron injection induced gate leakage current on the noise performance of InAlAs/InGaAs double-gate HEMT has been studied following a comprehensive analytical approach. The presence of two gates… read more here.
Keywords: double gate; gate leakage; gate; noise ... See more keywords
Improving the performance of dual-k spacer underlap Double Gate TFET
Sign Up to like & getrecommendations! Published in 2018 at "Superlattices and Microstructures"
DOI: 10.1016/j.spmi.2018.10.006
Abstract: Abstract In this paper, the effect of dual-k spacer is investigated on underlap Double-Gate TFET (DGTFET) for low-k and high-k gate dielectrics. Simulation study shows that the position of dual-k spacer junction must be aligned… read more here.
Keywords: double gate; gate; dual spacer; underlap double ... See more keywords
An analytical 2-D model of triple metal double gate graded channel junctionless MOSFET with hetero-dielectric gate oxide stack
Sign Up to like & getrecommendations! Published in 2021 at "Solid State Communications"
DOI: 10.1016/j.ssc.2021.114521
Abstract: In this paper, a two-dimensional analytical model of a laterally graded-channel triplemetal double-gate Junctionless Field Effect Transistor with hetero dielectric gate oxide stack consisting of SiO2 and HfO2 is derived. The model illustrates higher drive… read more here.
Keywords: double gate; analytical model; gate; graded channel ... See more keywords
Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs
Sign Up to like & getrecommendations! Published in 2021 at "Scientific Reports"
DOI: 10.1038/s41598-021-92378-7
Abstract: A ternary logic decoder (TLD) is demonstrated with independently controlled double-gate (ICDG) silicon-nanowire (Si-NW) MOSFETs to confirm a feasibility of mixed radix system (MRS). The TLD is essential component for realization of the MRS. The… read more here.
Keywords: independently controlled; ternary logic; double gate; gate ... See more keywords
Ferroelectric transistors with asymmetric double gate for memory window exceeding 12 V and disturb-free read.
Sign Up to like & getrecommendations! Published in 2021 at "Nanoscale"
DOI: 10.1039/d1nr05107e
Abstract: Ferroelectric field-effect transistors (FeFETs) with a single gate structure and using the newly discovered ferroelectric hafnium oxide as an active material are attracting considerable interest for nonvolatile memory devices. However, such FeFETs struggle to achieve… read more here.
Keywords: memory window; double gate; free read; disturb free ... See more keywords