Articles with "dram" as a keyword



Photo by indiratjokorda from unsplash

True Nonvolatile High‐Speed DRAM Cells Using Tailored Ultrathin IGZO

Sign Up to like & get
recommendations!
Published in 2023 at "Advanced Materials"

DOI: 10.1002/adma.202210554

Abstract: Severe power consumption in the continuous scaling of Silicon‐based dynamic random access memory (DRAM) technology quests for a transistor technology with a much lower off‐state leakage current. Wide bandgap amorphous oxide semiconductors, especially indium‐gallium‐zinc‐oxide (IGZO)… read more here.

Keywords: high speed; speed dram; true nonvolatile; dram ... See more keywords
Photo from wikipedia

Task‐aware swapping for efficient DNN inference on DRAM‐constrained edge systems

Sign Up to like & get
recommendations!
Published in 2022 at "International Journal of Intelligent Systems"

DOI: 10.1002/int.22933

Abstract: Object detection at the edge side is a common task in various environments. The deployment of convolutional neural networks in intelligent edge systems is very challenging because of the highly constrained main‐memory space. This study… read more here.

Keywords: systems task; edge systems; task; task aware ... See more keywords
Photo by acfb5071 from unsplash

Ultra-low power 1T-DRAM in FDSOI technology

Sign Up to like & get
recommendations!
Published in 2017 at "Microelectronic Engineering"

DOI: 10.1016/j.mee.2017.05.047

Abstract: A systematic study of a capacitorless 1T-DRAM fabricated in 28nm FDSOI technology is presented. The operation mechanism is based on band modulation. The Z2-FET memory cell features a large current sense margin and small OFF-state… read more here.

Keywords: fdsoi technology; power; dram; low power ... See more keywords
Photo from wikipedia

Translation, Cross-cultural Adaptation and Reliability of Brazilian portuguese version of the DRAM Questionnaire for Psychometric Evaluation in Low Back Pain ∗

Sign Up to like & get
recommendations!
Published in 2020 at "Revista Brasileira de Ortopedia"

DOI: 10.1055/s-0039-1700812

Abstract: Objective  Based on studies regarding pain physiology and its relation to emotional distress conditions, psychological evaluation became essential to determine the most favorable patient profiles to distinct therapeutic approaches. The Distress Risk Assessment Method (DRAM)… read more here.

Keywords: brazilian portuguese; dram; portuguese version; version dram ... See more keywords
Photo by phcsantos from unsplash

kb_DRAM: annotation and metabolic profiling of genomes with DRAM in KBase

Sign Up to like & get
recommendations!
Published in 2022 at "Bioinformatics"

DOI: 10.1093/bioinformatics/btad110

Abstract: Summary Annotation is predicting the location of and assigning function to genes in a genome. DRAM is a tool developed to annotate bacterial, archaeal and viral genomes derived from pure cultures or metagenomes. DRAM distills… read more here.

Keywords: dram; annotation metabolic; metabolic profiling; kbase ... See more keywords
Photo by syhussaini from unsplash

DRAM for distilling microbial metabolism to automate the curation of microbiome function

Sign Up to like & get
recommendations!
Published in 2020 at "Nucleic Acids Research"

DOI: 10.1093/nar/gkaa621

Abstract: Abstract Microbial and viral communities transform the chemistry of Earth's ecosystems, yet the specific reactions catalyzed by these biological engines are hard to decode due to the absence of a scalable, metabolically resolved, annotation software.… read more here.

Keywords: metabolism; dram distilling; microbiome function; dram ... See more keywords
Photo by saadahmad_umn from unsplash

Polycrystalline-Silicon-MOSFET-Based Capacitorless DRAM With Grain Boundaries and Its Performances

Sign Up to like & get
recommendations!
Published in 2021 at "IEEE Access"

DOI: 10.1109/access.2021.3068987

Abstract: In this work, a capacitorless one-transistor dynamic random access memory (1T-DRAM) based on a polycrystalline silicon (poly-Si) metal–oxide–semiconductor field-effect transistor was designed and analyzed through a technology computer-aided design (TCAD) simulation. A poly-Si thin film… read more here.

Keywords: tex math; dram; grain boundaries; inline formula ... See more keywords
Photo from wikipedia

A Hybrid Low-Dropout (LDO) Regulator Using a Load Replication Circuit for DRAM Cores

Sign Up to like & get
recommendations!
Published in 2022 at "IEEE Access"

DOI: 10.1109/access.2022.3223135

Abstract: This paper presents a cost-effective hybrid low drop-out regulator (LDO) circuitry for state-of-the-art DDR DRAM cores that not only supports various refresh operations, but also meets the JEDEC specification of the refresh period by improving… read more here.

Keywords: load replication; dram cores; replication circuit; inline formula ... See more keywords
Photo from wikipedia

An Innovative Indicator to Evaluate DRAM Cell Transistor Leakage Current Distribution

Sign Up to like & get
recommendations!
Published in 2018 at "IEEE Journal of the Electron Devices Society"

DOI: 10.1109/jeds.2017.2758026

Abstract: This paper is the first to propose an innovative method for measuring variations in dynamic random access memory (DRAM) cell transistors. Structural dispersion induces an extremely high cell leakage current, which determines aspects of DRAM… read more here.

Keywords: cell leakage; leakage; dram; distribution ... See more keywords
Photo from wikipedia

SALAD: Achieving Symmetric Access Latency with Asymmetric DRAM Architecture

Sign Up to like & get
recommendations!
Published in 2017 at "IEEE Computer Architecture Letters"

DOI: 10.1109/lca.2016.2525760

Abstract: Memory access latency has significant impact on application performance. Unfortunately, the random access latency of DRAM has been scaling relatively slowly, and often directly affects the critical path of execution, especially for applications with insufficient… read more here.

Keywords: latency; symmetric access; dram; access ... See more keywords
Photo from academic.microsoft.com

Counter-Based Tree Structure for Row Hammering Mitigation in DRAM

Sign Up to like & get
recommendations!
Published in 2017 at "IEEE Computer Architecture Letters"

DOI: 10.1109/lca.2016.2614497

Abstract: Scaling down DRAM technology degrades cell reliability due to increased coupling between adjacent DRAM cells, commonly referred to as crosstalk. Moreover, high access frequency of certain cells (hot cells) may cause data loss in neighboring… read more here.

Keywords: row; row hammering; dram; based tree ... See more keywords