Cross-Layer Optimization for High Speed Adders: A Pareto Driven Machine Learning Approach
Sign Up to like & getrecommendations! Published in 2019 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2018.2878129
Abstract: In spite of maturity to the modern electronic design automation (EDA) tools, optimized designs at architectural stage may become suboptimal after going through physical design flow. Adder design has been such a long studied fundamental… read more here.
Keywords: pareto frontier; adder; machine learning; design ... See more keywords
A Design Flow for Click-Based Asynchronous Circuits Design With Conventional EDA Tools
Sign Up to like & getrecommendations! Published in 2021 at "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"
DOI: 10.1109/tcad.2020.3038337
Abstract: The “event-driven” feature of asynchronous circuits enables the circuits to work when and where needed, making it a good alternative to design low-power circuits. However, asynchronous circuits are not widely adopted as a consequence of… read more here.
Keywords: asynchronous circuits; design flow; conventional eda; eda tools ... See more keywords