EDWAC: A Deadlock-Free Scheme for Compiling Whole Programs onto Dynamically Reconfigurable Dataflow Architectures
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DOI: 10.1109/tcad.2025.3572343
Abstract: Coarse-grained reconfigurable arrays (CGRAs) have become prevailing to accelerate regular kernels coupled with a host processor. As the end-to-end applications are increasingly complex, it is necessary to consider mapping whole programs onto a monolithic CGRA,… read more here.
Keywords: programs onto; dataflow architectures; reconfigurable dataflow; edwac deadlock ... See more keywords