A Fast-Lock All-Digital Clock Generator for Energy Efficient Chiplet-Based Systems
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DOI: 10.1109/access.2022.3224451
Abstract: An all-digital clock frequency multiplier that achieves excellent locking time for an energy-efficient chiplet-based system-on-chip (SoC) design is presented. The proposed architecture is based on an all-digital multiplying delay-locked loop (MDLL) to provide fast locking… read more here.
Keywords: digital clock; efficient chiplet; time; fast lock ... See more keywords