An Efficient TDC Using a Dual-Mode Resource-Saving Method Evaluated in a 28-nm FPGA
Sign Up to like & getrecommendations! Published in 2022 at "IEEE Transactions on Instrumentation and Measurement"
DOI: 10.1109/tim.2021.3136267
Abstract: FPGA-based time-to-digital converters (TDCs) are required to be accurate, linear, and fast, while at the same time employing a reduced number of resources. Pushing these requirements to the limit is challenging, although it is constantly… read more here.
Keywords: dual mode; fpga based; efficient tdc; mode ... See more keywords
ParCha: A New Resource-Efficient TDC With Salient Linearity Performance Using Parallel Short Chains
Sign Up to like & getrecommendations! Published in 2024 at "IEEE Transactions on Instrumentation and Measurement"
DOI: 10.1109/tim.2024.3472861
Abstract: Time-to-digital converters (TDCs) is a widely used high-precision time interval measurement unit. However, the field programmable gate array (FPGA)-based TDC is known to suffer from the nonlinearity problem and is vulnerable to temperature variations. To… read more here.
Keywords: efficient tdc; resource efficient; time; new resource ... See more keywords