3D TCAD Analysis Enabling ESD Layout Design Optimization
Sign Up to like & getrecommendations! Published in 2020 at "IEEE Journal of the Electron Devices Society"
DOI: 10.1109/jeds.2020.3027034
Abstract: On-chip electrostatic discharge (ESD) protection design for integrated circuits (ICs) is a challenging design-for-reliability problem. Since ESD events involve very high current transients in very short time period, current crowding is unavoidable, which leads to… read more here.
Keywords: layout design; esd; tcad; esd layout ... See more keywords