Fabrication of Planar-Integrated SIS Mixer Circuits with Improved Uniformity and Yield
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DOI: 10.1007/s10909-020-02433-2
Abstract: Single-pixel prototype superconductor–insulator–superconductor (SIS) mixer integrated circuits (ICs) for multi-beam heterodyne receivers were fabricated. We introduced plasma-enhanced chemical vapor deposition (PE-CVD) for insulator layer deposition and machine-aligned via-hole etching for contact-hole definition on SIS junctions… read more here.
Keywords: sis; sis mixer; uniformity yield; fabrication planar ... See more keywords