Sign Up to like & get
recommendations!
0
Published in 2020 at "IEEE Access"
DOI: 10.1109/access.2020.2970215
Abstract: WiNoC has become a promising on-chip interconnect architecture. Due to the integration and manufacturing limits of wireless interconnects in nanotechnology, WiNoC systems are more susceptible to high failure rates. In this paper, we propose a…
read more here.
Keywords:
fault tolerant;
routing algorithm;
fault aware;
regional fault ... See more keywords
Sign Up to like & get
recommendations!
1
Published in 2021 at "IEEE Access"
DOI: 10.1109/access.2021.3066217
Abstract: The broad learning system (BLS) framework gives an efficient solution for training flat-structured feedforward networks and flat structured deep neural networks. However, the classical BLS model and other variants focus on the faultless situation only,…
read more here.
Keywords:
learning system;
bls;
fault aware;
network ... See more keywords
Sign Up to like & get
recommendations!
1
Published in 2018 at "IEEE Computer Architecture Letters"
DOI: 10.1109/lca.2018.2840137
Abstract: Phase-change memory (PCM) and resistive memory (RRAM) are promising alternatives to traditional memory technologies. However, both PCM and RRAM suffer from limited write endurance and due to process variation from scaling, increasing number of early…
read more here.
Keywords:
retrofit;
aware wear;
retrofit fault;
wear leveling ... See more keywords