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Published in 2017 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/isscc.2016.7418030
Abstract: Multiported high-performance on-die memories occupy significantly more die area than a comparable single-port memory. Among various multiport memory topologies, the 1-read (R), 1-write (W) 8-transistor (T) Static Random Access Memory (SRAM) with a decoupled read…
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Keywords:
sense amplifier;
1r1w sram;
finfet cmos;
small signal ... See more keywords
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Published in 2018 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2017.2778280
Abstract: This paper presents a 32 Gb/s non-return-to-zero optical link using 850-nm vertical-cavity surface-emitting laser-based multi-mode optics with 14-nm bulk FinFET CMOS circuits. The target application is the integration of optics on to the first-level package,…
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Keywords:
optical link;
dbm sensitivity;
link;
finfet cmos ... See more keywords
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Published in 2022 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2022.3147467
Abstract: We review the design trade-offs that exist in CMOS inverter-based shunt-feedback transimpedance amplifier (SF-TIA) when optimizing for energy efficiency. We analyze the performance of series and shunt inductive peaking techniques for bandwidth enhancement and identify…
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Keywords:
cmos;
128 single;
finfet cmos;
inline formula ... See more keywords
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2
Published in 2023 at "IEEE Journal of Solid-State Circuits"
DOI: 10.1109/jssc.2022.3228632
Abstract: This article details the design and measurement of a digital-to-analog converter (DAC)-based source-series terminated (SST) transmitter (TX) for wireline applications in 4-nm FinFET CMOS technology. The DAC achieves 8-bit resolution and high analog output bandwidth…
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Keywords:
wireline;
finfet cmos;
transmitter;
dac based ... See more keywords